Motorola MPC823e Reference Manual page 625

Bit 0—Reserved
This bit is reserved and must be set to 0.
EDGE—Clock Edge
This field determines the clock edge the DPLL uses to adjust the received sample point after
a jitter occurs in the received signal. These bits are ignored in the UART protocol or the x1
mode of the RDCR field.
00 = Both the positive and negative edges are used for changing the sample point
(default).
01 = Positive edge. Only the positive edge of the received signal is used for changing
the sample point.
10 = Negative edge. Only the negative edge of the received signal is used for changing
the sample point.
11 = No adjustment is made to the sample point.
TCI—Transmit Clock Invert
0 = Normal operation.
1 = Before it is used, the internal transmit clock (TCLK) is inverted by a serial
communication controller. This allows a serial communication controller to clock
data out one-half clock earlier on the rising edge of TCLK rather than on the falling
edge. In this mode, the serial communication controllers offer a minimum and
maximum "rising clock edge to data" specification. Data output by a serial
communication controller after the rising edge of an external transmit clock can be
latched by the external receiver one clock cycle later on the next rising edge of the
same transmit clock. This option is recommended for Ethernet, HDLC, or
Transparent operation when the clock rates are higher than 8MHz to improve data
setup time for the external receiver.
TSNC—Transmit Sense
This bit indicates the amount of time the internal sense signal stays active after the last
transition on the RXDx pin, thus indicating that the line is free. For instance, TSNC can be
used in the AppleTalk protocol to avoid a spurious CTSx-changed interrupt that would
otherwise occur during the frame sync sequence preceding the opening flags.
If the RDCR field is configured to 1 × mode, the delay is the greater of the two numbers listed.
If RDCR is configured to 8 × , 16 × , or 32 × mode, the delay is the lesser of the two numbers
listed.
00 = Infinite—Carrier sense is always active (default).
01 = 14- or 6.5-bit times as determined by the RDCR field.
10 = 4- or 1.5-bit times as determined by the RDCR field (normally for AppleTalk).
11 = 3- or 1-bit times as determined by the RDCR field.
MOTOROLA MPC823e REFERENCE MANUAL
Communication Processor Module
16-171