Motorola MPC823e Reference Manual page 695

Microprocessor for mobile computing
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The following reception errors can be detected by the SCCx HDLC controller.
• Overrun Error—The SCCx HDLC controller maintains an internal FIFO for receiving
data. The communication processor module begins programming the SDMA channel
and updating the CRC when 8 or 32 bits are received in the FIFO. When a receive FIFO
overrun occurs, the channel writes the received data byte to the internal FIFO over the
previously received byte. The previous data byte and the frame status are lost. The
channel closes the buffer with the OV bit in the RX buffer descriptor set and generates
the RXF interrupt if it is enabled. The receiver then enters hunt mode. Even if an overrun
occurs during a frame whose address is not matched in the address recognition logic,
an RX buffer descriptor with a data length of two is opened to report the overrun and
the RXF interrupt is generated if it is enabled.
• CD Lost During Frame Reception Error — When this error occurs, the channel
terminates frame reception, closes the buffer, sets the CD bit in the RX buffer
descriptor, and generates the RXF interrupt if it is enabled. This error has the highest
priority. The rest of the frame is lost and other errors are not checked in that frame. At
this point, the receiver enters hunt mode.
• Abort Sequence Error — This error occurs when seven or more consecutive ones are
received. When it does occur and the SCCx HDLC controller receives a frame, the
channel closes the buffer by setting the AB bit in the RX buffer descriptor and
generating the RXF interrupt, if enabled. The channel also increments the abort
sequence counter. The CRC and nonoctet error status conditions are not checked on
aborted frames. The receiver then enters hunt mode. When an abort is received, you
are given no indication that an SCCx HDLC controller is not currently receiving a frame.
• Nonoctet Aligned Frame Error — When this error occurs, the channel writes the received
data to the data buffer, closes the buffer, sets the NO bit in the RX buffer descriptor, and
generates the RXF interrupt if it is enabled. The CRC error status must be disregarded
on nonoctet frames. After a nonoctet aligned frame is received, the receiver enters hunt
mode. An immediate back-to-back frame is still received. The nonoctet data may be
derived from the last word in the data buffer as follows:
MSB
<—————valid data—————>
Note: If you are using the data buffer swapping option, the above diagram refers to the
last byte of the data buffer, not the last word. In SCCx-HDLC mode, the least-
significant bit of each octet is transmitted first and the most-significant bit of the
CRC is transmitted first.
MOTOROLA
1
<—————nonvalid data—————>
MPC823e REFERENCE MANUAL
Communication Processor Module
0
LSB
0
16-241

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