Motorola MPC823e Reference Manual page 717

TCLK
TXDx
CTSx
RTSx
16.9.17.2.3 Using the Time-Slot Assigner. Sometimes the HDLC bus can be used in a
configuration that has a local HDLC bus and a time-division multiplex transmission line that
is not an HDLC bus. Figure 16-88 illustrates such a case. The local HDLC bus controllers
all communicate over time-slots. However, more than one HDLC bus controller is assigned
to a given time-slot and the HDLC bus protocol controls access during that time-slot.
RX
LINE
DRIVER
TX
NOTES:
1. All TX pins of slave devices should be configured to open-drain in the port C parallel I/O port.
2. The TSA in the serial interface of each station is used to configure the preferred time-slot.
3. You can choose the number of stations to share a time-slot. In this example, two are used.
Figure 16-88. HDLC Bus Time-Slot Assigner Transmission Line Configuration
MOTOROLA
2ND BIT
1ST BIT
Figure 16-87. Delayed RTSx Mode
CTSx CTSx
HDLC BUS
HDLC BUS
CONTROLLER CONTROLLER
A B
STATIONS SHARE TIME-SLOT N
MPC823e REFERENCE MANUAL
Communication Processor Module
COLLISION
3RD BIT
RTSx ACTIVE FOR ONLY
2 BIT TIMES
LOCAL HDLC BUS
CTSx
HDLC BUS
CONTROLLER
C
STATIONS SHARE TIME-SLOT M
+5
R
CTSx
HDLC BUS
CONTROLLER
D
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