Translation Reload Examples - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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Memory Management Unit
11.8.1.1 TRANSLATION RELOAD EXAMPLES. The following are code examples for
generating the real page number using a two-level tree page table structure. The first
example is for a data TLB reload and the second is for an instruction TLB reload. Notice that
the following assumptions are made:
• M_TWB holds the base pointer to the first level table.
• Both instruction and data address translation is turned off (MSR
dtlb_swtw
mtspr
mfspr
lwz
mtspr
mfspr
lwz
mtspr
mfspr
rfi
itlb_swtw
mtspr
mfspr
mtspr
mfspr
lwz
mtspr
mtspr
mfspr
lwz
mtspr
mfspr
rfi
11-50
M_TW, R1
# save R1
R1, M_TWB
# load R1 with level one pointer
R1, (R1)
# Load level one page entry
MD_TWC,R1
# save level two base pointer and
# level one attributes
R1, MD_TWC
# load R1 with level two pointer
# while taking into account the
# page size
R1, (R1)
# Load level two page entry
MD_RPN, R1
# Write TLB entry
R1, M_TW
# restore R1
M_TW, R1
# save R1
R1, SRR0
# load R1 with instruction miss
# effective address (the same data
# may be taken from the MI_EPN
# register)
MD_EPN, R1
# save instruction miss effective
# address in MD_EPN
R1, M_TWB
# load R1 with level one pointer
R1, (R1)
# Load level one page entry
MI_TWC,R1
# save level one attributes
MD_TWC,R1
# save level two base pointer
R1, MD_TWC
# load R1 with level two pointer
# while taking into account the
# page size
R1, (R1)
# Load level two page entry
MI_RPN, R1
# Write TLB entry
R1, M_TW
# restore R1
MPC823e REFERENCE MANUAL
=0 and MSR
=0).
IR
DR
MOTOROLA

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