Motorola MPC823e Reference Manual page 889

Communication Processor Module
16.12.2 SPI Clocking and Pin Functions
You can configure the serial peripheral interface as a master for the serial channel or as a
slave. You can also use it in a multimaster environment. When the serial peripheral interface
is a master, use the SPI baud rate generator to generate the SPI transmit and receive
clocks. It takes its input from the BRGCLK, which is generated in the clock synthesizer of
the MPC823e, specifically for the SPI baud rate generator and the other three baud rate
generators in the communication processor module.
The SPIMISO pin is an input in master mode and an output in slave mode. It follows then,
that the SPIMOSI pin is an output in master mode and an input in slave mode. The SPIMOSI
and SPIMISO pins change functionality between master and slave mode to support a
multimaster configuration that allows communication from one serial peripheral interface to
another with the same hardware configuration.
When the serial peripheral interface is in master mode, SPICLK is the clock output signal
that shifts in the received data from the SPIMISO pin and shifts out the transmitted data to
the SPIMOSI pin. Additionally, an SPI master device must provide a slave-select signal
output to enable the SPI slave devices. You can implement this by using one of the
MPC823e general-purpose I/O pins. The SPISEL pin must not be asserted while the serial
peripheral interface is in master mode or an error will occur.
When the serial peripheral interface is in slave mode, SPICLK is the clock input signal that
shifts in the received data from the SPIMOSI pin and shifts out the transmitted data to the
SPIMISO pin. The SPISEL pin provided by the MPC823e is the enable input to the SPI
slave. When the serial peripheral interface is operating in a multimaster environment, the
SPISEL pin is still an input and is used to detect an error condition when more than one
master is operating.
Using the fields in the SPI mode register, you can select any of the four combinations of the
gated SPICLK phase and polarity. The SPI pins can also be configured as open-drain pins
to support a multimaster configuration in which the same SPI pin is driven by the MPC823e
or an external SPI device.
MOTOROLA MPC823e REFERENCE MANUAL 16-435