Motorola MPC823e Reference Manual page 839

In UART and Transparent modes, the serial management controllers have a memory
structure that is similar to the serial communication controllers. Each buffer is referenced by
a buffer descriptor and organized in a buffer descriptor ring located in the dual-port RAM, as
illustrated in Figure 16-116.
DUAL- PORT RAM
SMCx TX BD RING
SMCx RX BD RING
POINTER TO SMCx
RX BD RING
POINTER TO SMCx
TX BD RING
The buffer descriptor ring allows you to define buffers for transmission and reception and
each ring forms a circular queue. Using the buffer descriptors, the communication processor
module confirms reception and transmission so that the microprocessor knows the buffers
have been serviced. The data buffers can reside in external or internal memory and the data
buffers reside in the parameter area of an SCCx or SMCx if that channel is not enabled.
16.11.4 SMC General Parameter RAM Memory Map
Each SMCx parameter RAM area begins at the same offset from each base. The
protocol-specific portions of the SMCx parameter RAM are discussed in each mode. The
SMCx general parameter RAM shared by the UART and transparent protocols is described
in Table 16-36. The GCI protocol has its own parameter RAM.
You must initialize certain parameter RAM values before a serial management controller is
enabled. Other values are initialized or written by the communication processor module.
Once initialized, most parameter RAM values do not need to be accessed in your software
since most of the activity is centered around the transmit and receive buffer descriptors and
not the parameter RAM. However, if you access the parameter RAM, note the following
restrictions.
MOTOROLA
TX BD RING
FRAME STATUS
DATA LENGTH
DATA POINTER
RX BD RING
FRAME STATUS
DATA LENGTH
DATA POINTER
Figure 16-116. SMCx Memory Format
MPC823e REFERENCE MANUAL
Communication Processor Module
EXTERNAL MEMORY
TX DATA BUFFER
RX DATA BUFFER
16-385