Motorola MPC823e Reference Manual page 407

15.5.4.1 THE RAM WORD. The RAM word is a 32-bit wide micro-instruction that is stored
in one of 64 locations in the RAM array.
15.5.4.1.1 RAM Word Format. The RAM word format selects and specifies the timing of all
external signals controlled by the user-programmable machine.
RAM WORD
BIT 0 1 2
FIELD
CST4 CST1 CST2
RESET
— — —
R/W
R/W R/W R/W
ADDR
BIT 16 17 18
G4T4/
FIELD
G3T4 G3T3
DLT3
RESET
— — —
R/W
R/W R/W R/W
ADDR
*
NOTE: All 32 bits of the RAM word are addressed as shown in the address row above.
— = Undefined.
CST4—Chip-Select Timing 4
This bit defines the state of the CSx signal during clock phase 1.
0 = The CSx signal is asserted at the trailing edge of GCLK2.
1 = The CSx signal is negated at the trailing edge of GCLK2.
Note: The state of the selected CSx signal depends on the value of each CSTx bit and
the corresponding bank.
CST1—Chip-Select Timing 1
This bit defines the state of the CSx signal during clock phase 2.
0 = The CSx signal is asserted at the rising edge of GCLK1.
1 = The CSx signal is negated at the rising edge of GCLK1.
CST2—Chip-Select Timing 2
This bit defines the state of the CSx signal during clock phase 3.
0 = The CSx signal is asserted at the rising edge of GCLK2.
1 = The CSx signal is negated at the rising edge of GCLK2.
MOTOROLA
3 4 5 6 7
CST3 BST4 BST1 BST2 BST3
— — — — —
R/W R/W R/W R/W R/W
(MCR ) INDIRECT ADDRESSING OF 1 OF 64 ENTRIES
MAD
19 20 21 22 23
G4T3/
G5T4 G5T3 RESERVED
WAEN
— — — —
R/W R/W R/W R/W
*
MPC823e REFERENCE MANUAL
Memory Controller
8 9 10 11 12
G0L G0H G1T4
— — —
R/W R/W R/W
24 25 26 27 28
LOOP EXEN AMX NA
— — — —
R/W R/W R/W R/W
13 14 15
G1T3 G2T4 G2T3
— — —
R/W R/W R/W
29 30 31
UTA TODT LAST
— — —
R/W R/W R/W
15-49