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MASKNUM—Mask Number
This read-only field is mask-programmed with a code corresponding to the mask number of
the part on which the system interface unit is located. It is intended to help with factory test
and user code that is sensitive to part refinements. As a result, the value of this field depends
on the mask revision.
12.12.1.3 SYSTEM PROTECTION CONTROL REGISTER. The system protection control
register (SYPCR) controls the system monitors, software watchdog period, and bus monitor
timing. This register can be read at any time, but can only be written once after system reset.
SYPCR
BIT
0
1
2
FIELD
RESET
R/W
ADDR
BIT
16
17
18
FIELD
RESET
R/W
ADDR
SWTC—Software Watchdog Timer Count
This field contains the count value for the software watchdog timer.
BME—Bus Monitor Enable
This bit controls the operation of the bus monitor when an internal to external bus cycle is
executed.
0 = Disable the bus monitor.
1 = Enable the bus monitor.
Note: If the bus monitor is disabled, the transfer error conditions will not assert the
TEA pin.
BMT—Bus Monitor Timing
This field defines the timeout period, in 8 system clock resolution, for the bus monitor. The
maximum timeout is 2,040 clocks.
Bits 25–27—Reserved
These bits are reserved and must be set to 0.
MOTOROLA
3
4
5
6
7
SWTC
1
R/W
(IMMR & 0xFFFF0000) + 0x004
19
20
21
22
23
BMT
BME
1
R/W
R/W
(IMMR & 0xFFFF0000) + 0x006
MPC823e REFERENCE MANUAL
System Interface Unit
8
9
10
11
12
24
25
26
27
28
RESERVED
SWF
SWE SWRI SWP
0
0
0
R/W
R/W
13
14
15
29
30
31
1
1
1
R/W
R/W
R/W
12-35
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