Hard Reset Configuration Word - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
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Reset
4.3.1.1 HARD RESET CONFIGURATION WORD. The hard reset configuration word is
sampled from the data bus. At reset, the bits will determine the default values of the
corresponding bits in the SIUMCR, IMMR, and MSR.

HARD RESET CONFIGURATION WORD

BIT
0
1
2
FIELD
EARB
IIP
RES
DEFAULT
0
0
0
BIT
16
17
18
FIELD
DEFAULT
NOTE: The default value is due to the internal pull-down resistor on the data bus.
EARB—External Arbitration
If this bit is set (1), external arbitration is assumed. If it is cleared (0), then internal arbitration
is performed. See Section 12 System Interface Unit for more information.
IIP—Initial Interrupt Prefix
This bit defines the initial value of the MSR
the interrupt table location. If IIP is zero (default), the MSR
sampled one, the MSR
IP
Bits 2, 6, and 15—Reserved
These bits are reserved and must be left open.
BDIS—Boot Disable
0 = The memory controller is activated after reset so that it matches all addresses.
1 = The memory controller is not activated after reset, but it is cleared.
BPS—Boot Port Size
This field defines the port size of the boot device.
00 = 32-bit port size.
01 = 8-bit port size.
10 = 16-bit port size.
11 = Reserved.
4-10
3
4
5
6
7
BDIS
BPS
RES
ISB
0
0
0
0
19
20
21
22
23
RESERVED
0
immediately after reset. The MSR
IP
initial value is zero.
MPC823e REFERENCE MANUAL
8
9
10
11
12
DBGC
DBPC
0
0
24
25
26
27
28
initial value is one, but if it is
IP
13
14
15
EBDF
RES
0
0
29
30
31
bit defines
IP
MOTOROLA

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