Motorola MPC823e Reference Manual page 478

Communication Processor Module
16.2.6.7 RISC TIMER INITIALIZATION SEQUENCE EXAMPLE. Follow these steps to
initialize the RISC timers:
1. Configure the RCCR to determine the preferred tick interval that will be used for the
entire timer table. Normally, you can set the TIME bit at this time. However, it can be
set later if all RISC timers must be synchronized.
2. Determine the maximum number of timers to be located in the timer table. Configure
the TM_BASE pointer of the RISC timer table parameter RAM to point to a location in
the dual-port RAM with 4 × N bytes available, where N is the number of timers. If N is
less than 16, use timer 0 through timer N–1 to save space.
3. Clear the TM_CNT counter of the RISC timer table parameter RAM to show how many
ticks have elapsed since the RISC internal timer was enabled (optional).
4. Clear the RTER, if it is not already cleared. A one clears this register.
5. Configure the RTMR to enable the timers that need to generate interrupts.
6. Set the R-TT bit in the CIMR to generate interrupts to the system. Make sure the CPM
interrupt controller is properly initialized.
7. Configure the TM_CMD register of the RISC timer table parameter RAM. At this point,
determine whether a timer is to be enabled or disabled, one-shot or restart, and what
its timeout period must be. If the timer is being disabled, all parameters besides the
timer number are ignored.
8. Issue the SET TIMER command by writing 0x0851 to the CPCR.
9. Repeat steps 7 and 8 for each timer to be enabled or disabled.
As an example, the following sequence demonstrates how the RISC timer 0 is initialized to
generate an interrupt approximately every second using a 25MHz general system clock:
1. Write 111111 to the TIMEP field of the RCCR to generate the slowest clock. This value
generates a tick every 65,536 clocks, which is every 2.6 milliseconds at 25MHz.
2. Configure the TM_BASE pointer of the RISC timer table parameter RAM to point to a
location in the dual-port RAM with 4 bytes available. Assuming that the beginning of
dual-port RAM is available, write 0x0000 to TM_BASE.
3. Write 0x0000 to the TM_CNT counter of the RISC timer table parameter RAM to see
how many ticks have elapsed since the RISC internal timer was enabled (optional).
4. Write 0xFFFF to the RTER to clear any previous events.
5. Write 0x0001 to the RTMR to enable RISC timer 0 to generate an interrupt.
6. Write 0x00020000 to the CPM interrupt mask register so the RISC timers will generate
a system interrupt. Initialize the CPM interrupt configuration register.
7. Write 0xC0000EE6 to the TM_CMD register of the RISC timer table parameter RAM.
This enables RISC timer 0 to timeout after 3,814 (decimal) ticks. The timer
automatically restarts after it times out.
8. Write 0x0851 to the CPCR to issue the SET TIMER command.
9. Set the TIME bit in the RCCR to operate the RISC timer.
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