Motorola MPC823e Reference Manual page 595

16.7.5.6 SERIAL INTERFACE RAM POINTER REGISTER. The 32-bit, read-only serial
interface RAM pointer (SIRP) register indicates the RAM entry that is currently being
serviced. It contains the real-time status location of the serial interface that is currently inside
the TDM frame. Although you may not need to access the SIRP register, it does provide
information that might be helpful for debugging and for synchronizing system activity with
TDM activity. Usually, reading the SISTR is sufficient for most applications.
You can determine which RAM entry in the serial interface RAM is currently in progress, but
you cannot determine the status within that entry. For example, if the RAM entry is
programmed to select four contiguous time-slots from the TDM and the SIRP register
indicates the entry is currently active, you will not know which of the four time-slots is
currently in progress. The SIRP register does, however, change its status as soon as the
next serial interface RAM entry begins processing.
Note: You can externally connect one of the eight strobes to an interrupt pin to
generate an interrupt on a particular serial interface RAM entry.
The value of this register changes on serial clock transitions. Before acting on the
information found in this register, you must perform two reads and verify that they returned
the same value. The pointers provided by this register indicate the serial interface RAM entry
word offset that is currently in progress.
SIRP
BIT 0 1 2
FIELD
RESERVED VTB
RESET
0 0
R/W
R R
ADDR
BIT 16 17 18
FIELD
RESERVED VRB
RESET
0 0
R/W
R R
ADDR
MOTOROLA
3 4 5 6 7
TBPTR
0
R
(IMMR & 0xFFFF0000) + 0xAF0
19 20 21 22 23
RBPTR
0
R
(IMMR & 0xFFFF0000) + 0xAF2
MPC823e REFERENCE MANUAL
Communication Processor Module
8 9 10 11 12
RESERVED VTA TAPTR
0 0
R R
24 25 26 27 28
RESERVED VRA RAPTR
0 0
R R
13 14 15
0
R
29 30 31
0
R
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