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If the CTSx pin is programmed to envelope the data, it must remain asserted during frame
transmission or a CTSx lost error occurs. Negation of the CTSx pin forces the RTSx pin high
and the transmit data to an idle state. If the CTSS bit in the GSMR_H is zero, the CTSx pin
must be sampled by a serial communication controller before a CTSx lost is recognized.
Otherwise, the negation of CTSx immediately causes the CTSx lost condition. Refer to
Figure 16-68 for details.
TCLK
TXDx
(OUTPUT)
RTSx
(OUTPUT)
CTSx
CTSx SAMPLED LOW HERE
(INPUT)
NOTE: CTSS is set to 1 in the GSMR. CTSP is set to 0 or no CTS lost can occur.
TCLK
TXDx
(OUTPUT)
RTSx
FIRST BIT OF FRAME DATA
(OUTPUT)
CTSx
(INPUT)
NOTE: CTSS is set to 1 in the GSMR. CTSP is set to 0 or no CTS lost can occur.
Figure 16-68. CTSx Lost in Synchronous Protocols
Note: If the CTSS bit in the GSMR_H is set, all CTSx transitions must occur while the
transmit clock is low.
MOTOROLA
FIRST BIT OF FRAME DATA
CTSx SAMPLED HIGH HERE
MPC823e REFERENCE MANUAL
Communication Processor Module
DATA FORCED HIGH
RTSx FORCED HIGH
CTS LOST SIGNALED IN FRAME BD
DATA FORCED HIGH
RTSx FORCED HIGH
CTS LOST SIGNALED IN FRAME BD
16-191
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