Motorola MPC823e Reference Manual page 658

Communication Processor Module
The UART transmit shift register transmits the outgoing data on the TXDx pin. Data is then
clocked synchronously with the transmit clock, which can have an internal or external
source. The RFW bit in the GSMR_H must be set for an 8-bit receive FIFO.
16.9.15.4 SCCx UART PARAMETER RAM MEMORY MAP. When configured to operate
in UART mode, the serial communication controllers overlay the structure used in
Table 16-24 with the UART-specific parameters described in Table 16-26.
Table 16-26. SCCx UART Parameter RAM Memory Map
ADDRESS
SCCx Base + 30
SCCx Base + 34
SCCx Base + 38
SCCx Base + 3A
SCCx Base + 3C
SCCx Base + 3E
SCCx Base + 40
SCCx Base + 42
SCCx Base + 44
SCCx Base + 46
SCCx Base + 48
SCCx Base + 4A
SCCx Base + 4C
SCCx Base + 4E
SCCx Base + 50 CHARACTER1
SCCx Base + 52 CHARACTER2
SCCx Base + 54 CHARACTER3
SCCx Base + 56 CHARACTER4
SCCx Base + 58 CHARACTER5
SCCx Base + 5A CHARACTER6
SCCx Base + 5C CHARACTER7
SCCx Base + 5E CHARACTER8
SCCx Base + 60
SCCx Base + 62
SCCx Base + 64
NOTE: You are only responsible for initializing the items in bold.
SCCx base = (IMMR & 0xFFFF0000) + 0x3D00 (SCC2) and 0x3E00 (SCC3).
All references to registers in the parameter RAM table are actually implemented in the dual-port
RAM area as a memory-based register.
16-204
NAME WIDTH
RES Word
RES Word
MAX_IDL Half-word
IDLC Half-word
BRKCR Half-word
PAREC Half-word
FRMEC Half-word
NOSEC Half-word
BRKEC Half-word
BRKLN Half-word
UADDR1 Half-word
UADDR2 Half-word
RTEMP Half-word
TOSEQ Half-word
Half-word
Half-word
Half-word
Half-word
Half-word
Half-word
Half-word
Half-word
RCCM Half-word
RCCRP Half-word
RLBC Half-word
MPC823e REFERENCE MANUAL
DESCRIPTION
Reserved
Reserved
Maximum Idle Characters
Temporary idle Counter
Break Count Register (Transmit)
Receive Parity Error Counter
Receive Framing Error Counter
Receive Noise Counter
Receive Break Condition Counter
Last Received Break Length
UART Address Character 1
UART Address Character 2
Temp Storage
Transmit Out-of-Sequence Character
Control Character 1
Control Character 2
Control Character 3
Control Character 4
Control Character 5
Control Character 6
Control Character 7
Control Character 8
Receive Control Character Mask
Receive Control Character Register
Receive Last Break Character
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