Motorola MPC823e Reference Manual page 795

0 1 2
E RES W
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
NOTE: You are only responsible for initializing the items in bold.
Note: The communication processor module sets all the status bits in this buffer
descriptor, but you must clear them before submitting the buffer descriptor to the
communication processor module.
E—Empty
0 = The data buffer associated with this RX buffer descriptor has been filled with data
or has stopped receiving data because an error occurred. The core is free to
examine or write to any fields of this RX buffer descriptor. The communication
processor module does not use this buffer descriptor as long as the E bit is zero.
1 = The data buffer associated with this RX buffer descriptor is empty or is currently
receiving data. This RX buffer descriptor and its associated receive buffer are
owned by the communication processor module. Once the E bit is set, the core
must not write any fields of this RX buffer descriptor.
Bits 1, 6, and 8–9—Reserved
These bits are reserved and must be set to 0.
W—Wrap (Final Buffer Descriptor in Table)
0 = This is not the last buffer descriptor in the RX buffer descriptor table.
1 = This is the last buffer descriptor in the RX buffer descriptor table. After this buffer
is used, the communication processor module receives incoming data into the first
buffer descriptor that RBASE points to in the table. The number of RX buffer
descriptors in this table is programmable and determined only by the W bit and
overall space constraints of the dual-port RAM.
I—Interrupt
0 = No interrupt is generated after this buffer is used.
1 = The RXB or RXF bit of the SCCE–Ethernet register is set when this buffer is used
by the SCCx Ethernet controller. These two bits can cause interrupts if they are
enabled.
MOTOROLA
3 4 5 6 7
I L F RES M
DATA LENGTH
RX DATA BUFFER POINTER
MPC823e REFERENCE MANUAL
Communication Processor Module
8 9 10 11 12
RES LG NO SH CR
13 14 15
OV CL
16-341