Features; Section 1 Introduction - Motorola MPC823e Reference Manual

Microprocessor for mobile computing
Table of Contents

Advertisement

SECTION 1
INTRODUCTION
The MPC823e microprocessor is a versatile, one-chip integrated microprocessor and
peripheral combination that can be used in a variety of portable electronic products. It is a
version of the low-cost MPC823 with larger instruction and data caches, which will provide
for greater PowerPC core performance. The MPC823e microprocessor particularly excels
in low-power, portable, image capture, and personal communication products. It integrates
a high-performance embedded PowerPC
that uses a specialized RISC processor for imaging and communication. The
communication processor module can perform embedded signal processing functions for
image compression and decompression and supports seven serial channels—two serial
communication controllers, two serial management controllers, one I
serial bus channel, and one serial peripheral interface. This two-processor architecture
consumes power more efficiently than traditional architectures because the communication
processor module frees the core from peripheral responsibilities like imaging and
communication.

1.1 FEATURES

The following list summarizes the main features of the MPC823e:
• Embedded PowerPC Core Provides 99MIPS (Using Dhrystone 2.1) or
172K Dhrystones 2.1 at 75MHz
Single-Issue, 32-Bit Version of the PowerPC Core (Fully Compatible with the
PowerPC Architecture Definition) with 32 x 32-Bit Fixed-Point Registers
Low Power Consumption, 2.2V Internal, 3.3V I/O Boundary with Microprocessor
Core, Caches, Memory Management, and I/O in Operation
Performs Branch Folding, Branch Prediction with Conditional Prefetch, without
Conditional Execution
8K Data Cache and 16K Instruction Cache
Four-Way Instruction Cache and Two-Way Data Cache are Set-Associative,
Physical Address, 4-Word Line Burst, LRU Replacement Algorithm, Lockable
Online Granularity
Memory Management Units with 32-Entry Translation Lookaside Buffers (TLBs)
and Fully Associative Instruction and Data TLBs
Memory Management Units Support Multiple Page Sizes of 4K, 16K, 512K and 8M
(1K Protection Granularity at the 4K Page Size); 16 Virtual Address Spaces and
16 Protection Groups
• Advanced On-Chip Emulation Debug Mode
MOTOROLA
core with a communication processor module
MPC823e REFERENCE MANUAL
2
C port, one universal
1-1

Advertisement

Table of Contents
loading

Table of Contents