Motorola MPC823e Reference Manual page 465

FLG—Command Semaphore Flag
The bit is set by the core and cleared by the communication processor module.
0 = The communication processor module is ready to receive a new command.
1 = The CPCR contains a command that the communication processor module is
currently processing. The communication processor module clears this bit when
the command finishes executing or after reset.
16.2.6.2 COMMAND DEFINITIONS. The RISC microcontroller requires an opcode and a
channel number to determine the command to issue. These opcodes and their definitions
are described below. The opcodes and channel numbers that appear in Table 16-2 are
actually the commands to be issued in the CPCR.
Table 16-2. RISC Microcontroller Commands
SCC2 USB
OPCODE
(0100) OR (0000)
SCC3
(1000)
0000 INIT
RX AND TX
PARAMS
0001 INIT RX
PARAMS
0010 INIT TX
PARAMS
0011 ENTER
HUNT
MODE
0100 STOP TX STOP TX
ENDPOINT
0101 GRACEFUL
STOP TX
0110 RESTART RESTART
TX TX
ENDPOINT
0111 CLOSE
RX BD
1000 SET —
GROUP
ADDRESS
1001 — —
1010
1011 — —
1100 — —
1101 — —
1110 — —
1111 — USB
Command
NOTE: — = Reserved.
MOTOROLA
CHANNEL NUMBER
SMC1 SMC1 SPI
(1001) OR (1001) OR (0101)
SMC2 SMC2
(1101) (1101)
(UART/ (GCI)
TRANS)
INIT INIT INIT
RX AND TX RX AND TX RX AND TX
PARAMS PARAMS PARAMS
INIT RX — INIT RX
PARAMS PARAMS
INIT TX — INIT TX
PARAMS PARAMS
ENTER — —
HUNT
MODE
STOP TX — —
— — —
RESTART — —
TX
CLOSE — CLOSE
RX BD RX BD
— — —
— GCI —
TIMEOUT
— GCI ABORT —
REQUEST
— — —
— — —
— — —
— — —
— — —
MPC823e REFERENCE MANUAL
Communication Processor Module
2
I C IDMA1 IDMA2
(0001) (0001) (0101)
INIT — —
RX AND TX
PARAMS
INIT RX — —
PARAMS
INIT TX — —
PARAMS
— — —
— — —
— INIT INIT
IDMA IDMA
— — —
CLOSE — —
RX BD
— — —
— — —
— — —
— STOP STOP
IDMA IDMA
— — — START
— ARM ARM
IDMA IDMA
— — —
— — —
DSP1 DSP2 TIMER
RX TX (0101)
(1001) (1101)
— — —
— — —
— — —
— — —
— — —
— — —
— — —
— — —
— — SET
TIMER
— — —
— — —
— — —
START —
DSP DSP
INIT INIT —
DSP DSP
— — —
— — —
16-11