Motorola MPC823e Reference Manual page 862

Communication Processor Module
12. Initialize the RX buffer descriptor. Assume the RX data buffer is at 0x00001000 in main
memory. Write 0xB000 to RX_BD_Status, 0x0000 to RX_BD_Length (not required),
and 0x00001000 to RX_BD_Pointer.
13. Initialize the TX buffer descriptor. Assume the TX data buffer is at 0x00002000 in main
memory and contains five 8-bit characters. Then write 0xB000 to TX_BD_Status,
0x0005 to TX_BD_Length, and 0x00002000 to TX_BD_Pointer.
14. Write 0xFF to the SMCE–UART register to clear any previous events.
15. Write 0x17 to the SMCM–UART register to enable all possible serial management
controller interrupts.
16. Write 0x00000010 to the CIMR so SMC1 can generate a system interrupt. The CICR
must also be initialized.
17. Write 0x4820 to SMCMR to configure normal operation (not loopback), 8-bit
characters, no parity, 1 stop bit. Notice that the transmitter and receiver are not
enabled yet.
18. Write 0x4823 to SMCMR to enable the SMC1 transmitter and receiver. This additional
write ensures that the TEN and REN bits are enabled last.
Note: After 5 bytes are transmitted, the TX buffer descriptor is closed. The receive
buffer is closed after 16 bytes are received. Any data received after 16 bytes
causes a busy (out-of-buffers) condition since only one RX buffer descriptor is
prepared.
16.11.6.16 HANDLING INTERRUPTS IN THE SMCx UART CONTROLLER. Follow
these steps to handle an interrupt in a serial management controller:
1. Once an interrupt occurs, read the SMCE–UART register to discover the cause of the
interrupt. To clear the SMCE bits, write ones to them.
2. Process the TX buffer descriptor to reuse it if the TX bit is set in the SMCE–UART
register. Extract data from the RX buffer descriptor if the RX bit is set in the
SMCE–UART. To transmit another buffer, set the R bit in the TX buffer descriptor.
3. Clear the SMCx bit in the CISR.
4. Execute the rfi instruction.
16-408 MPC823e REFERENCE MANUAL MOTOROLA