Figure 14.37 Read From Synchronous Dram (Row Hit); Figure 14.38 Write To Synchronous Dram Precharge Bank - Hitachi SH7751 Hardware Manual

CKIO
DBREQ
BAVL
TR
A25–A0
D31–D0
RAS, CAS,
WE

Figure 14.37 Read from Synchronous DRAM (Row Hit)

CKIO
DBREQ
BAVL
TR
A25–A0
D31–D0
RAS, CAS,
WE

Figure 14.38 Write to Synchronous DRAM Precharge Bank

CA
D0 D1
RD
RA CA
D0 D1 D2 D3
BA WT
D2 D3
Rev. 3.0, 04/02, page 535 of 1064