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Bits 11 to 8—Resource Select 3 to 0 (RS3–RS0): These bits specify the transfer request source.
Bit 11:
Bit 10:
Bit 9:
RS3
RS2
RS1
0
0
0
1
1
0
1
1
0
0
1
1
0
1
Notes: *1 External request specifications are valid only for channels 0 and 1. Requests are not
accepted for channels 2 and 3 in normal DMA mode.
*2 Dual address mode
*3 In DDT mode, an external request specification is possible for channels 0, 1, 2, and 3.
Rev. 3.0, 04/02, page 478 of 1064
Bit 8:
RS0
Description
0
External request, dual address mode*
space
external address space)
1
Setting prohibited
0
External request, single address mode
External address space
1
External request, single address mode
External device
0
Auto-request (external address space
2
space)*
1
Auto-request (external address space
2
module)*
0
Auto-request (on-chip peripheral module
2
space)*
1
Setting prohibited
0
SCI transmit-data-empty interrupt transfer request
(external address space
1
SCI receive-data-full interrupt transfer request
(SCRDR1
0
SCIF transmit-data-empty interrupt transfer request
(external address space
1
SCIF receive-data-full interrupt transfer request
(SCFRDR2
0
TMU channel 2 (input capture interrupt, external address space
external address space)*
1
TMU channel 2 (input capture interrupt)
(external address space
0
TMU channel 2 (input capture interrupt)
(on-chip peripheral module
1
Setting prohibited
external device*
external address space*
SCTDR1)*
external address space)*
SCFTDR2)*
external address space)*
2
on-chip peripheral module)*
external address space)*
1
3
*
(external address
(Initial value)
1,
3
*
1,
3
*
external address
on-chip peripheral
external address
2
2
2
2
2
2
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