Figure 14.48 Single Address Mode/Burst Mode/32-Byte Block Transfer/ External Bus - Hitachi SH7751 Hardware Manual

Superh risc engine
Table of Contents

Advertisement

CKIO
DBREQ
BAVL
TR
A25–A0
D31–D0
RAS,
CAS, WE
TDACK
ID1, ID0
No DTR cycle, so requests can be made at any time
Figure 14.48 Single Address Mode/Burst Mode/32-Byte Block Transfer/
Direct Data Transfer Request to Channel 2 without Using Data Bus
Rev. 3.0, 04/02, page 542 of 1064
RA
BA


External Bus
External Device Data Transfer/
CA
D0
D1
RD
10
D2
D3

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sh7751r

Table of Contents