Block Diagram; Figure 22.1 Pcic Block Diagram - Hitachi SH7751 Hardware Manual

22.1.2

Block Diagram

Figure 22.1 is a block diagram of the PCIC.
Interrupts
Internal peripheral
module bus
(Peripheral bus)
Bus request
Acknowledge
PCIC module
Interrupt
control
Internal
peripheral
module bus
interface
Local
register

Figure 22.1 PCIC Block Diagram

PCI bus interface
PCI
Local
configuration
register
register
Data transfer
control
32B
Local
register
PCIC bus controller
Local
register
Local bus
Local bus clock
Feedback
(Bφ) cycle: Bcyc
input clock
from CKIO
Rev. 3.0, 04/02, page 803 of 1064
PCI bus
FIFO
× ×
2 sides 6
PCI clock
33/66 MHz
(PCICLK)