Section 12 Timer Unit (Tmu); Overview; Features - Hitachi SH7751 Hardware Manual

Superh risc engine
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12.1

Overview

The SH7751 Series includes an on-chip 32-bit timer unit (TMU) comprising five 32-bit timer
channels (channels 0 to 4).
12.1.1

Features

The TMU has the following features.

Auto-reload type 32-bit down-counter provided for each channel

Input capture function provided in channel 2

Selection of rising edge or falling edge as external clock input edge when external clock is
selected or input capture function is used

32-bit timer constant register for auto-reload use, readable/writable at any time, and 32-bit
down-counter provided for each channel

Selection of seven counter input clocks for channels 0 to 2
External clock (TCLK), on-chip RTC output clock, five internal clocks (P


P
/256, P
/1024) (P

Selection of five internal clocks for channels 3 and 4

Channels 0 to 2 can also operate in module standby mode when the on-chip RTC output clock
is selected as the counter input clock; that is, timer operation continues even when the clock
has been stopped for the TMU.
Timer count operations using an external or internal clock are only possible when a clock is
supplied to the timer unit.

Two interrupt sources
One underflow source (channels 0 to 4) and one input capture source (channel 2)

DMAC data transfer request capability
On channel 2, a data transfer request is sent to the DMAC when an input capture interrupt is
generated.

Section 12 Timer Unit (TMU)


is the peripheral module clock)


/4, P
/16, P
Rev. 3.0, 04/02, page 287 of 1064

/64,

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