Hitachi SH7751 Hardware Manual page 824

Table 21.3 Structure of Boundary Scan Register (cont)
No. Pin name
389 AUDATA0
388 AUDATA0
387 AUDCK
386 AUDCK
385 AUDSYNC
384 AUDSYNC
383 MD7/
382 MD7/
381 MD7/
380 MD0/SCK2
379 MD0/SCK2
378 MD0/SCK2
377 MD1/TXD2
376 MD1/TXD2
375 MD1/TXD2
374 SCK
373 SCK
372 SCK


371


370


369
368 TCLK
367 TCLK
366 TCLK
365 RXD
364 MD2/RXD2
363 TXD
362 TXD
361 TXD

360
Note: CTL is a low-active signal. The relevant pin is driven to the OUT state when CTL is set
LOW.






/MD8
/MD8
/MD8
Type
CTL
OUT
CTL
OUT
CTL
OUT
IN
CTL
OUT
IN
CTL
OUT
IN
CTL
OUT
IN
CTL
OUT
IN
CTL
OUT
IN
CTL
OUT
IN
IN
IN
CTL
OUT
IN
Rev. 3.0, 04/02, page 785 of 1064