Figure 14.6 Dma Transfer Timing In Single Address Mode - Hitachi SH7751 Hardware Manual

Superh risc engine
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CKIO
A28–A0
CSn
D63–D0
DACK
WE
(a) From external device with DACK to external memory space
CKIO
A28–A0
CSn
D63–D0
RD
DACK
(b) From external memory space to external device with DACK

Figure 14.6 DMA Transfer Timing in Single Address Mode

Address output to external memory
space
Data output from external device
with DACK
DACK signal to external
device with DACK
WE signal to external memory space
Address output to external memory
space
Data output from external memory
space
RD signal to external memory space
DACK signal to external
device with DACK
Rev. 3.0, 04/02, page 495 of 1064

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