Timer Start Register (Tstr) - Hitachi SH7751 Hardware Manual

Bit 0—Timer Clock Pin Control (TCOE): Specifies whether timer clock pin TCLK is used as
the external clock or input capture control input pin, or as the on-chip RTC output clock output
pin.
Bit 0: TCOE
0
1
Note: * Low-level output in standby mode; high-impedance output in hardware standby mode.
12.2.2

Timer Start Register (TSTR)

TSTR is an 8-bit readable/writable register that specifies whether the channel 0–2 timer counters
(TCNT) are operated or stopped.
TSTR is initialized to H'00 by a power-on or manual reset. In module standby mode, TSTR is not
initialized when the input clock selected by each channel is the on-chip RTC output clock
(RTCCLK), and is initialized only when the input clock is the external clock (TCLK) or internal

clock (P ).
Bit: 7
—
Initial value: 0
R/W: R
Bits 7 to 3—Reserved: These bits are always read as 0. A write to these bits is invalid, but the
write value should always be 0.
Bit 2—Counter Start 2 (STR2): Specifies whether timer counter 2 (TCNT2) is operated or
stopped.
Bit 2: STR2
0
1
Description
Timer clock pin (TCLK) is used as external clock input or input capture
control input pin
Timer clock pin (TCLK) is used as on-chip RTC output clock output pin*
6 5
— —
0 0
R R
Description
TCNT2 count operation is stopped
TCNT2 performs count operation
4 3
— — STR2
0 0
R R R/W
Rev. 3.0, 04/02, page 291 of 1064
(Initial value)
2 1 0
STR1 STR0
0 0 0
R/W R/W
(Initial value)