Usage Notes - Hitachi SH7751 Hardware Manual

See section 5, Exceptions, for priorities and the relationship with non-SCIF interrupts.
16.5

Usage Notes

Note the following when using the SCIF.
SCFTDR2 Writing and the TDFE Flag: The TDFE flag in the serial status register (SCFSR2) is
set when the number of transmit data bytes written in the transmit FIFO data register (SCFTDR2)
has fallen to or below the transmit trigger number set by bits TTRG1 and TTRG0 in the FIFO
control register (SCFCR2). After TDFE is set, transmit data up to the number of empty bytes in
SCFTDR2 can be written, allowing efficient continuous transmission.
However, if the number of data bytes written in SCFTDR2 is equal to or less than the transmit
trigger number, the TDFE flag will be set to 1 again after being read as 1 and cleared to 0. TDFE
clearing should therefore be carried out when SCFTDR2 contains more than the transmit trigger
number of transmit data bytes.
The number of transmit data bytes in SCFTDR2 can be found from the upper 8 bits of the FIFO
data count register (SCFDR2).
SCFRDR2 Reading and the RDF Flag: The RDF flag in the serial status register (SCFSR2) is
set when the number of receive data bytes in the receive FIFO data register (SCFRDR2) has
become equal to or greater than the receive trigger number set by bits RTRG1 and RTRG0 in the
FIFO control register (SCFCR2). After RDF is set, receive data equivalent to the trigger number
can be read from SCFRDR2, allowing efficient continuous reception.
However, if the number of data bytes in SCFRDR2 is equal to or greater than the trigger number,
the RDF flag will be set to 1 again if it is cleared to 0. RDF should therefore be cleared to 0 after
being read as 1 after all the receive data has been read.
The number of receive data bytes in SCFRDR2 can be found from the lower 8 bits of the FIFO
data count register (SCFDR2).
Break Detection and Processing: Break signals can be detected by reading the RxD2 pin directly
when a framing error (FER) is detected. In the break state the input from the RxD2 pin consists of
all 0s, so the FER flag is set and the parity error flag (PER) may also be set.
Although the SCIF stops transferring receive data to SCFRDR2 after receiving a break, the receive
operation continues.
Sending a Break Signal: The input/output condition and level of the TxD2 pin are determined by
bits SPB2IO and SPB2DT in the serial port register (SCSPTR2). This feature can be used to send
a break signal.
Rev. 3.0, 04/02, page 676 of 1064