Timer Start Register 2 (Tstr2) - Hitachi SH7751 Hardware Manual

Bit 1—Counter Start 1 (STR1): Specifies whether timer counter 1 (TCNT1) is operated or
stopped.
Bit 1: STR1
0
1
Bit 0—Counter Start 0 (STR0): Specifies whether timer counter 0 (TCNT0) is operated or
stopped.
Bit 0: STR0
0
1
12.2.3

Timer Start Register 2 (TSTR2)

TSTR2 is an 8-bit readable/writable register that specifies whether the channel 3 and 4 timer
counters (TCNT) are operated or stopped.
TSTR2 is initialized to H'00 by a power-on reset. TSTR retain their contents in standby mode.
When standby mode is entered when the value of either STR3 or STR4 is 1, the count halts when
the peripheral module clock stops and restarts when the clock supply is resumed.
Bit: 7
—
Initial value: 0
R/W: R
Bits 7 to 2—Reserved: These bits are always read as 0. A write to these bits is invalid, but the
write value should always be 0.
Bit 1—Counter Start 4 (STR4): Specifies whether timer counter 4 (TCNT4) is operated or
stopped.
Bit 1: STR4
0
1
Rev. 3.0, 04/02, page 292 of 1064
Description
TCNT1 count operation is stopped
TCNT1 performs count operation
Description
TCNT0 count operation is stopped
TCNT0 performs count operation
6 5
— —
0 0
R R
Description
TCNT4 count operation is stopped
TCNT4 performs count operation
4 3
— —
0 0
R R
(Initial value)
(Initial value)
2 1
— STR4 STR3
0 0
R R/W R/W
(Initial value)
0
0