Hitachi SH7751 Hardware Manual page 503

Superh risc engine
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The following kinds of DMAC transfer activation requests are provided

External request
(1) Normal DMA mode

Two
External requests can only be accepted on channel 0 and channel 1.
(2) On-demand data transfer mode (DDT mode)
The SH7551 performs interfacing between an external device and the DMAC using the


,
interfacing between an external device and the DMAC using the

, ID [2:0], and D[31:0] pins. External requests can be accepted on all eight
channels.
Channel 0 does not have a request queue, but channels 1 to 3 in the SH7751 and
channels 1 to 7 in the SH7751R each have four request queues.

On-chip peripheral modules
Transfer requests from the SCI, SCF, and TMU. These can be accepted on all channels.

Auto-request
A transfer request is generated automatically within the DMAC.

Channel functions: Transfer modes that can be set are different for each channel.
(1) Normal DMA mode
Channel 0: Single or dual address mode. External requests are accepted.
Channel 1: Single or dual address mode. External requests are accepted.
Channel 2: Dual address mode only
Channel 3: Dual address mode only
Channel 4 (SH7751R only): Dual address mode only
Channel 5 (SH7751R only): Dual address mode only
Channel 6 (SH7751R only): Dual address mode only
Channel 7 (SH7751R only): Dual address mode only
(2) DDT mode
Channel 0: Single or dual address mode. External requests are accepted.
Channel 1: Single or dual address mode. External requests are accepted.
Channel 2: Single or dual address mode. External requests are accepted.
Channel 3: Single or dual address mode. External requests are accepted.
Channel 4 (SH7751R only): Single or dual address mode. External requests are
accepted.
Channel 5 (SH7751R only): Single or dual address mode. External requests are
accepted.
Channel 6 (SH7751R only): Single or dual address mode. External requests are
accepted.
Rev. 3.0, 04/02, page 464 of 1064
pins. Low level detection or falling edge detection can be specified.


,
,
, ID [1:0], and D[31:0] pins. The SH7551R performs



,
,
,

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