Register Configuration - Hitachi SH7751 Hardware Manual

Table 22.1 Pin Configuration (cont)
PCI
Standard
No. Pin Name
Signal
Name

 
18 /
MD10

 
19

 
20

to


21 IDSEL IDSEL
in: Input
out: Output
s/t/s: Sustained try state
o/d: Open drain
t/s: Try state
Notes: *1 Terminal provided with a pull-up resistor.
*2 The values of external pins are sampled
*3 This must be fixed at Low when not in used.
22.1.4

Register Configuration

The PCIC has the PCI configuration registers and PCI control registers shown in table 22.2, 22.3
and 22.4. Also, the PCI bus address space is allocated to the internal bus for the peripheral
modules, making it possible to access the PCI bus by program IO (PIO). Not only do these
registers control the PCI bus but also enable high-speed data transfers between the PCI device and
memory on the SH-4 external data bus (hereinafter, the SH-4 external data bus is referred to as the
local bus to distinguish it from the PCI bus).
Function
Bus request (host
function)
Host bridge
function ON/OFF
Bus request
(host function)
to Bus grant
(host function)
Config device
select
I/O Pull-up
1
Type Resistor*
Master Target Master Target
t/s Yes I
in I
t/s Yes I
t/s O
in —
in a power-on reset by means of the
I/O Status
in Operating Modes
Host Non-host
I — —
I I
I — —
O — —
— I


Rev. 3.0, 04/02, page 805 of 1064
Remarks
2
I *
3
I *
pin
.