Figure 23.27 Synchronous Dram Auto-Precharge Write Bus Cycle: Burst (Rcd [1:0] = 01, Tpc [2:0] = 001, Trwl [2:0] = 010) - Hitachi SH7751 Hardware Manual

Figure 23.27 Synchronous DRAM Auto-Precharge Write Bus Cycle: Burst
(RCD [1:0] = 01, TPC [2:0] = 001, TRWL [2:0] = 010)
Rev. 3.0, 04/02, page 982 of 1064