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19.3.6
Interrupt Mask Clear Register 00 (INTMSKCLR00)
The interrupt mask clear register 00 (INTMSKCLR00) clears the masks for each request of the
corresponding interrupt. INTMSKCLR00 is a 32-bit write-only register.
Bit:
31
Initial value:
—
R/W:
W
Bit:
7
Initial value:
—
R/W:
W
Bits 31 to 0—Interrupt Mask Clear: These bits indicate the existence of an interrupt request
corresponding to each bit. For the correspondence between bits and interrupt sources, see section
19.3.7, INTREQ00, INTMSK00, and INTMSKCLR00 Bit Allocation.
Bits 31 to 0
0
1
30
29
—
—
W
W
6
5
—
—
W
W
Description
Do not change corresponding interrupt mask
Clear corresponding interrupt mask
. . .
11
. . .
. . .
—
. . .
W
4
3
—
—
W
W
Rev. 3.0, 04/02, page 745 of 1064
10
9
—
—
W
W
2
1
—
—
W
W
8
—
W
0
—
W
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