Pio Data Register (Pcipdr) - Hitachi SH7751 Hardware Manual

Bit 0—Port 0 Input/Output Data (PB0DT): Receives input data and sets output data when the
 
pin is used as a port.

22.2.41 PIO Data Register (PCIPDR)

Bit: 31
PPDA31 PPDA30 PPDA29 PPDA28 PPDA27 PPDA26 PPDA25 PPDA24
Initial value: —
PCI-R/W: —
PP Bus-R/W: R/W
Bit: 23
PPDA23 PPDA22 PPDA21 PPDA20 PPDA19 PPDA18 PPDA17 PPDA16
Initial value: —
PCI-R/W: —
PP Bus-R/W: R/W
Bit: 15
PPDA15 PPDA14 PPDA13 PPDA12 PPDA11 PPDA10
Initial value: —
PCI-R/W: —
PP Bus-R/W: R/W
Bit: 7
PPDA7
Initial value: —
PCI-R/W: —
PP Bus-R/W: R/W
The PIO data register (PCIPDR) sets the data for read/write in the PCI configuration cycle. This
32-bit read/write register can be accessed from the PP bus.
The PCIPDR register is not initialized at a power-on reset or software reset. The initial value is
undefined.
Always write to this register before accessing the PCI configuration space. Always read/write to
this register after setting the value in the PIO address register (PIOPAR).
The configuration cycle on the PCI bus can be generated by reading/writing to this register.
Rev. 3.0, 04/02, page 878 of 1064
30 29
— —
— —
R/W R/W
22 21
— —
— —
R/W R/W
14 13
— —
— —
R/W R/W
6 5
PPDA6 PPDA5
— —
— —
R/W R/W
28 27
— —
— —
R/W R/W
20 19
— —
— —
R/W R/W
12 11
— —
— —
R/W R/W
4 3
PPDA4 PPDA3 PPDA2
— —
— —
R/W R/W
26 25
— —
— —
R/W R/W R/W
18 17
— —
— —
R/W R/W R/W
10 9
PPDA9 PPDA8
— —
— —
R/W R/W R/W
2 1
PPDA1 PPDA0
— —
— —
R/W R/W R/W
24
—
—
16
—
—
8
—
—
0
—
—