Control Signal Timing; Table 23.24 Control Signal Timing (1) - Hitachi SH7751 Hardware Manual

23.3.2

Control Signal Timing

Table 23.24 Control Signal Timing (1)

Item Symbol


setup time t
BREQS


hold time t
BREQH

delay time t
BACKD
Bus tri-state delay t
BOFF1
time
Bus tri-state delay t
BOFF2
time to standby
mode
Bus buffer on time t
BON1
Bus buffer on time t
BON2
from standby
STATUS0/1 delay t
STD1
time
STATUS0/1 delay t
STD2
time to standby
Note: * V = 3.0 to 3.6 V, V
DDQ
HD6417751R HD6417751R
BP240 BP200
*
Min Max Min
2.0 — 2.5
1.5 — 1.5
— 5.3 —
— 12 —
— 2 —
— 12 —
— 1 —
— 5.3 —
— 2 —
= 1.5 V typ, Ta = –20 to 75
DD
HD6417751R
F240
* *
Max Min Max
— 3.5 —
— 1.5 —
5.3 — 6
12 — 12
2 — 2
12 — 12
1 — 1
5.3 — 6
2 — 2

C, C = 30 pF, PLL2 on
L
Rev. 3.0, 04/02, page 961 of 1064
HD6417751R
F200
*
Min Max Unit Figure
3.5 — ns 23.11
1.5 — ns 23.11
— 6 ns 23.11
— 12 ns 23.11
— 2 t 23.12
cyc
— 12 ns 23.11
— 1 t 23.12
cyc
— 6 ns 23.12
— 2 t 23.12
cyc