Figure 22.2 Pio Memory Space Access - Hitachi SH7751 Hardware Manual

Superh risc engine
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31
24 23
PCI memory
H'FD
space address
31
24 23
PIOMBR
I/O Transfers: This section describes how to access I/O space using PIO transfers. The 256kB
from H'FE240000 to H'FE27FFFF of area P4 (H'1E240000 to H'1E27FFFF in area 7) is allocated
as PCI I/O address space. This space is used for the least significant 18 bits of the PCI address.
The most significant 14 bits (IOBR [31:18]) of the I/O space base register (PCIIOBR) are used as
the most significant 14 bits of the PCI address. These two addresses are combined to specify the
32-bit PCI address.
For transfers to the I/O space, first specify the most significant 14 bits of the PCI address in
PCIIOBR, then access the PCI I/O address space. If within the 256kB space, you can access the
PCI I/O address space consecutively simply by setting the PCIIOBR once. If it is necessary to
access another address space beyond 256kB, set PCIIOBR again.
When performing locked transfers in I/O transfers, set the I/O space lock specification bit (LOCK)
in the PCIIOBR. The I/O space is locked while the LOCK bit is set. The same precautions apply
to LOCK I/O transfers as to LOCK memory transfers.
H'FD000000
PCI memory
space
H'FDFFFFFF
0
0
LOCK identifier

Figure 22.2 PIO Memory Space Access

16 Mbytes
31
24 23
PCI address
Rev. 3.0, 04/02, page 887 of 1064
2
0
00

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