TCLK
RTC internal clock
V
-RTC
DD
Figure 23.60 RTC Oscillation Settling Time at Power-On
SCK, SCK2
Figure 23.62 SCI I/O Synchronous Mode Clock Timing
t
t
TCLKWH
TCLKWL
Figure 23.59 TCLK Input Timing
V
-RTC min
DD
t
SCKW
t
Scyc
Figure 23.61 SCK Input Clock Timing
SCK
TXD
RXD
t
TCLKf
Oscillation settling time
t
ROSC
t
SCKf
t
Scyc
t
t
TXD
TXD
t
t
RXS
RXH
Rev. 3.0, 04/02, page 1019 of 1064
t
TCLKr
t
SCKr