Transmit Shift Register (Sctsr2); Transmit Fifo Data Register (Scftdr2) - Hitachi SH7751 Hardware Manual

Superh risc engine
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16.2.3

Transmit Shift Register (SCTSR2)

Bit:
7
R/W:
SCTSR2 is the register used to transmit serial data.
To perform serial data transmission, the SCIF first transfers transmit data from SCFTDR2 to
SCTSR2, then sends the data to the TxD2 pin starting with the LSB (bit 0).
When transmission of one byte is completed, the next transmit data is transferred from SCFTDR2
to SCTSR2, and transmission started, automatically.
SCTSR2 cannot be directly read or written to by the CPU.
16.2.4

Transmit FIFO Data Register (SCFTDR2)

Bit:
7
R/W:
W
SCFTDR2 is a 16-stage FIFO register that stores data for serial transmission.
If SCTSR2 is empty when transmit data has been written to SCFTDR2, the SCIF transfers the
transmit data written in SCFTDR2 to SCTSR2 and starts serial transmission.
SCFTDR2 is a write-only register, and cannot be read by the CPU.
The next data cannot be written when SCFTDR2 is filled with 16 bytes of transmit data. Data
written in this case is ignored.
The contents of SCFTDR2 are undefined after a power-on reset or manual reset.
Rev. 3.0, 04/02, page 638 of 1064
6
5
6
5
W
W
4
3
4
3
W
W
W
2
1
2
1
W
W
0
0

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