Figure 23.28 Synchronous Dram Normal Write Bus Cycle: Act + Write Commands, Burst (Rcd [1:0] = 01, Trwl [2:0] = 010) - Hitachi SH7751 Hardware Manual

Figure 23.28 Synchronous DRAM Normal Write Bus Cycle: ACT + WRITE Commands,
Burst (RCD [1:0] = 01, TRWL [2:0] = 010)
Rev. 3.0, 04/02, page 983 of 1064