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memory read/memory write of the PCIC using target transfers. This is a 32-bit register that can be
read and written from the PP bus, or read only from the PCI bus.
The PCILSR [1:0] register is initialized to H'00000000 at a power-on reset and software reset.
Always write to this register before performing target transfers to specify the capacity of the
address space being used. Specify the value "(capacity –1) bytes" in bits 28 to 20. For example, to
secure a 32MB space, set the value H'01F00000.
If you specify all zeros, a 1MB space is reserved. You can specify an address space up to 512MB.
Refer to Table 22.6 in section 22.2.6, PCI Configuration Register 5 (PCICONF5).
Bits 31 to 29—Reserved: These bits always return 0 when read. Always write 0 to these bits
when writing.
Bits 28 to 20—Capacities of the Local Address Spaces 0, 1 (PLSR28 to 20): These bits specify
the capacities of the address space 0 and address space 1 in bytes. Specifying (capacity –1) bytes.
A 1MB space is secured if all zeros are specified.
Bits 19 to 0—Reserved: These bits always return 0 when read. Always write 0 to these bits.
Rev. 3.0, 04/02, page 843 of 1064
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