Figure 23.23 Synchronous Dram Normal Read Bus Cycle: Act + Read Commands, Burst (Rcd [1:0] = 01, Cas Latency = 3) - Hitachi SH7751 Hardware Manual

Figure 23.23 Synchronous DRAM Normal Read Bus Cycle: ACT + READ Commands,
Burst (RCD [1:0] = 01, CAS Latency = 3)
Rev. 3.0, 04/02, page 978 of 1064