Figure 14.47 Single Address Mode/Burst Mode/32-Byte Block Transfer/Dma Transfer Request To Channels 1-3 Using Data Bus - Hitachi SH7751 Hardware Manual

CKIO
DBREQ
BAVL
TR
A25–A0 RA CA
D31–D0
DTR D0 D1 D2 D3
ID = 1, 2, or 3
RAS,
BA RD
CAS, WE
TDACK
ID1, ID0
01 or 10 or 11
Figure 14.47 Single Address Mode/Burst Mode/32-Byte Block Transfer/DMA Transfer
Request to Channels 1–3 Using Data Bus
Rev. 3.0, 04/02, page 541 of 1064