Pci Dma Transfer Pci Address Register [3:0] (Pcidpa [3:0]) - Hitachi SH7751 Hardware Manual

Superh risc engine
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22.2.28 PCI DMA Transfer PCI Address Register [3:0] (PCIDPA [3:0])

Bit:
31
PDPA31 PDPA30 PDPA29 PDPA28 PDPA27 PDPA26 PDPA25 PDPA24
Initial value:
0
PCI-R/W:
R/W
PP Bus-R/W:
R/W
Bit:
23
PDPA23 PDPA22 PDPA21 PDPA20 PDPA19 PDPA18 PDPA17 PDPA16
Initial value:
0
PCI-R/W:
R/W
PP Bus-R/W:
R/W
Bit:
15
PDPA15 PDPA14 PDPA13 PDPA12 PDPA11 PDPA10
Initial value:
0
PCI-R/W:
R/W
PP Bus-R/W:
R/W
Bit:
7
PDPA7
Initial value:
0
PCI-R/W:
R/W
PP Bus-R/W:
R/W
The DMA transfer PCI address register [3:0] (PCIDPA [3:0]) specifies the starting address at the
PCI when performing DMA transfers. This 32-bit read/write register can be accessed from both
the PP bus and PCI bus.
The PCIINTM register is initialized to H'00000000 at a power-on reset and a software reset.
The transfer address of a byte boundary or character boundary can be set, but the 2 least
significant bits of this register are ignored, and the data of the longword boundary is transferred.
Before starting a DMA transfer, be sure to write to this register. After a DMA transfer starts, the
value in the register is not retained. Always re-set the register value before starting a new DMA
transfer after a DMA transfer has been completed.
Rev. 3.0, 04/02, page 858 of 1064
30
29
0
0
R/W
R/W
R/W
R/W
22
21
0
0
R/W
R/W
R/W
R/W
14
13
0
0
R/W
R/W
R/W
R/W
6
5
PDPA6
PDPA5
0
0
R/W
R/W
R/W
R/W
28
27
0
0
R/W
R/W
R/W
R/W
20
19
0
0
R/W
R/W
R/W
R/W
12
11
0
0
R/W
R/W
R/W
R/W
4
3
PDPA4
PDPA3
PDPA2
0
0
R/W
R/W
R/W
R/W
26
25
0
0
R/W
R/W
R/W
R/W
R/W
R/W
18
17
0
0
R/W
R/W
R/W
R/W
R/W
R/W
10
9
PDPA9
PDPA8
0
0
R/W
R/W
R/W
R/W
R/W
R/W
2
1
PDPA1
PDPA0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
24
0
16
0
8
0
0
0

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