Summary Of Memory-Mapped Oc Addresses; Figure 4.15 Memory-Mapped Oc Data Array - Hitachi SH7751 Hardware Manual

The following two kinds of operation can be used on the OC data array:
1. OC data array read
Longword data is read into the data field from the data specified by the longword specification
bits in the address field in the OC entry corresponding to the way and entry set in the address
field.
2. OC data array write
The longword data specified in the data field is written for the data specified by the longword
specification bits in the address field in the OC entry corresponding to the way and entry set in
the address field. This write does not set the U bit to 1 on the address array side.
31
Address field
1 1 1 1 0 1 0 1
31
Data field
L : Longword specification bits
: Reserved bits (0 write value, undefined read value)
4.6.5

Summary of Memory-Mapped OC Addresses

The memory-mapped OC addresses in cache-double-mode in the SH7751R are summarized below
using data area access as an example.


Normal mode (CCR.ORA = 0)
H'F500 0000 to H'F500 3FFF (16 kB): Way 0 (entries 0 to 511)
H'F500 4000 to H'F500 7FFF (16 kB): Way 1 (entries 0 to 511)
:
A shadow of the cache area occurs every 32 kbytes up to H'F5FF FFFF.


RAM mode (CCR.ORA = 1)
H'F500 0000 to H'F500 1FFF (8 kB): Way 0 (entries 0 to 255)
H'F500 2000 to H'F500 3FFF (8 kB): Way 1 (entries 0 to 255)
:
A shadow of the cache area occurs every 16 kbytes up to H'F5FF FFFF.
Rev. 3.0, 04/02, page 112 of 1064
24 23

Figure 4.15 Memory-Mapped OC Data Array

:
:
15 14 13
Way
Longword data
:
:
5 4 2 1 0
Entry L
0