Figure 23.3 Power-On Oscillation Settling Time; Figure 23.4 Standby Return Oscillation Settling Time (Return By Or ) - Hitachi SH7751 Hardware Manual

CKIO,
internal clock
VDD
MD10 to MD0
TRST
(High)
CA
Notes: 1. Oscillation settling time when on-chip resonator is used
2. PLL2 not operating
Standby
CKIO,
internal clock
or
Notes: 1. Oscillation settling time when on-chip resonator is used
2. PLL2 not operating
Figure 23.4 Standby Return Oscillation Settling Time (Return by
V min
DD

Figure 23.3 Power-On Oscillation Settling Time

t
RESW
t
OSC1
t
OSCMD
t
OSC2
Rev. 3.0, 04/02, page 957 of 1064
Stable oscillation
t
MDRH
t
TRSTRH
Stable oscillation
t
RESW


   

  
or )