Hitachi SH7751 Hardware Manual page 914

The port control register (PCIPCTR) selects whether to enable or disable port function allocation
for pins for unwanted PCI bus arbitration when the PCIC is used in non-host mode. It also
specifies the swithing ON/OFF of pin pull-up resistances and between input and output. This 32-
bit read/write register can be accessed from the PP bus.
The PCIPCTR register is initialized to H'00000000 at a power-on reset. It is not initialized at a
software reset.
When the PCIC is operating as host, the port function cannot be used if the arbitration function is
enabled.
Bits 31 to 19—Reserved: These bits always return 0 when read. Always write 0 to these bits
when writing.
Bit 18—Port 2 Enable (PORT2EN): Provides the enable control for the port 2.
Bit 18: PORT2EN
0
1
Bit 17—Port 1 Enable (PORT1EN): Provides the enable control for the port 1.
Bit 17: PORT1EN
0
1
Bit 16—Port 0 Enable (PORT0EN): Provides the enable control for the port 0.
Bit 16: PORT0EN
0
1
Bits 15 to 6—Reserved: These bits always return 0 when read. Always write 0 to these bits when
writing.
Bit 5—Port 2 Pull-up Resistance Control (PB2PUP): Controls pull-up resistance when
 
pin is used as port.
Bit 5: PB2PUP
0
1
Description
 
Do not use pins
 
Use pins or
Description
 
Do not use pins
 
Use pins or
Description
 
Do not use pins
 
Use pins or
Description


Pull-up pin


Do not pull-up


or as ports


as ports


or as ports


as ports


or as ports


as ports
pin
Rev. 3.0, 04/02, page 875 of 1064
(Initial value)
(Initial value)
(Initial value)
(Initial value)