Hitachi SH7751 Hardware Manual page 1055

Module Item Symbol Min Max


DMAC t
setup time


t
hold time
DRAKn t
delay time
INTC NMI pulse t
width (high)
t
NMI pulse
width (low)
H-UDI Input clock t
cycle
Input clock t
pulse width
(high)
Input clock t
pulse width
(low)
Input clock t
rise time
Input clock t
fall time


t
setup time


t
hold time
TDI/TMS t
setup time
TDI/TMS t
hold time
TDO delay t
time
ASE- t
PINBRK
pulse width
Notes: *1 Pcyc: P clock cycles
*2 V = 3.0 to 3.6 V, V
DDQ
Rev. 3.0, 04/02, page 1016 of 1064
HD6417751 HD6417751
RBP240 RBP200
2
*
Min Max
2 — 2.5
DRQS
1.5 — 1.5
DRQH
1.5 5.3 1.5
DRAKD
5 — 5
NMIH
30 — 30
5 — 5
NMIL
30 — 30
50 — 50
TCKcyc
15 — 15
TCKH
15 — 15
TCKL
— 10 —
TCKr
— 10 —
TCKf
10 — 10
ASEBRKS
10 — 10
ASEBRKH
15 — 15
TDIS
15 — 15
TDIH
0 10 0
TDO
2 — 2
PINBRK
= 1.5 V, Ta = –20 to +75°C, C
DD
HD6417751 HD6417751
RF240 RF200
2 2
* *
Min Max Min Max Unit
— 3.5 — 3.5
— 1.5 — 1.5
5.3 1.5 6 1.5
— 5 — 5
— 30 — 30
— 5 — 5
— 30 — 30
— 50 — 50
— 15 — 15
— 15 — 15
10 — 10 —
10 — 10 —
— 10 — 10
— 10 — 10
— 15 — 15
— 15 — 15
10 0 10 0
— 2 — 2
= 30 pF, PLL2 on
L
2
*
Figure Notes
— ns 23.64
— ns 23.64
6 ns 23.64
— t 23.69 Normal
cyc
or sleep
mode
— ns 23.69 Standby
mode
— t 23.69
Normal
cyc
or sleep
mode
— ns 23.69
Standby
mode
— ns 23.65,
23.67
— ns 23.65
— ns 23.65
10 ns 23.65
10 ns 23.65
— t 23.66
cyc
— t 23.66
cyc
— ns 23.67
— ns 23.67
10 ns 23.67
1
— Pcyc* 23.68