Processor Modes; Figure 2.6 Processor State Transitions - Hitachi SH7751 Hardware Manual

From any state when
RESET = 0
Interrupt
Bus-released state
Bus request
2.7

Processor Modes

There are two processor modes: user mode and privileged mode. The processor mode is
determined by the processor mode bit (MD) in the status register (SR). User mode is selected
when the MD bit is cleared to 0, and privileged mode when the MD bit is set to 1. When the reset
state or exception state is entered, the MD bit is set to 1. There are certain registers and bits which
can only be accessed in privileged mode.
From any state when
RESET = 1 and MRESET = 0
Power-on reset state
RESET = 1
Exception-handling state
Bus request
Bus request
clearance
Exception
interrupt
Bus request
Bus
clearance
request
Bus request
Program execution state
clearance
SLEEP instruction
with STBY bit
cleared
Sleep mode

Figure 2.6 Processor State Transitions

Manual reset state
RESET = 0
RESET = 1,
MRESET = 1
End of exception
transition
processing
SLEEP instruction
with STBY bit set
Standby mode
Rev. 3.0, 04/02, page 49 of 1064
Reset state
Interrupt
Power-down state