Appendix A Address List; Table A.1 Address List - Hitachi SH7751 Hardware Manual

Table A.1 Address List
Module Register P4 Address
PCIC PCIMEM H'FD00 0000
to
H'FDFF FFFF
INTC INTPRI00 H'FE08 0000 H'1E08 0000 32
INTC INTREQ00 H'FE08 0020 H'1E08 0020 32
INTC INTMSK00 H'FE08 0040 H'1E08 0040 32
INTC INTMSKCLR H'FE08 0060 H'1E08 0060 32
00
CPG CLKSTP00 H'FE0A 0000 H'1E0A 0000 32
CPG CLKSTPCLR H'FE0A 0008 H'1E0A 0008 32
00
TMU TSTR2 H'FE10 0004 H'1E10 0004 8
TMU TCOR3 H'FE10 0008 H'1E10 0008 32
TMU TCNT3 H'FE10 000C H'1E10 000C 32
TMU TCR3 H'FE10 0010 H'1E10 0010 16
TMU TCOR4 H'FE10 0014 H'1E10 0014 32
TMU TCNT4 H'FE10 0018 H'1E10 0018 32
TMU TCR4 H'FE10 001C H'1E10 001C 16
PCIC PCICONF0 H'FE20 0000 H'1E20 0000 32
PCIC PCICONF1 H'FE20 0004 H'1E20 0004 32
PCIC PCICONF2 H'FE20 0008 H'1E20 0008 32
PCIC PCICONF3 H'FE20 000C H'1E20 000C 32
PCIC PCICONF4 H'FE20 0010 H'1E20 0010 32
PCIC PCICONF5 H'FE20 0014 H'1E20 0014 32
PCIC PCICONF6 H'FE20 0018 H'1E20 0018 32

Appendix A Address List

Area 7
1
Address*
Size
H'FD00 0000 8,
to 16,
H'FDFF FFFF 32
Power-On Manual
Reset Reset
According to PCI memory space
H'0000 0000 Held
H'0000 0000 Held
H'0000 03FF Held
Write-only
H'0000 0000 Held
Write-only
H'00 Held
H'FFFF FFFF Held
H'FFFF FFFF Held
H'0000 Held
H'FFFF FFFF Held
H'FFFF FFFF Held
H'0000 Held
H'35051054 Held
(SH7751)/
H'350E1054
(SH7751R)
H'02900080 Held
Undefined Held
H'00000000 Held
H'00000001 Held
H'00000000 Held
H'00000000 Held
Rev. 3.0, 04/02, page 1031 of 1064
Synchro-
Stand- nization
by
Sleep Clock
Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Pclk
Held Held Pclk
Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk
Held Held Pclk