Table 7.10 Floating-Point Double-Precision Instructions; Table 7.11 Floating-Point Control Instructions - Hitachi SH7751 Hardware Manual

Superh risc engine
Table of Contents

Advertisement

Table 7.10 Floating-Point Double-Precision Instructions

Instruction
FABS
DRn
FADD
DRm,DRn
FCMP/EQ DRm,DRn
FCMP/GT
DRm,DRn
FDIV
DRm,DRn
FCNVDS
DRm,FPUL
FCNVSD
FPUL,DRn
FLOAT
FPUL,DRn
FMUL
DRm,DRn
FNEG
DRn
FSQRT
DRn
FSUB
DRm,DRn
FTRC
DRm,FPUL

Table 7.11 Floating-Point Control Instructions

Instruction
LDS
Rm,FPSCR
LDS
Rm,FPUL
LDS.L
@Rm+,FPSCR
LDS.L
@Rm+,FPUL
STS
FPSCR,Rn
STS
FPUL,Rn
STS.L
FPSCR,@-Rn
STS.L
FPUL,@-Rn
Rev. 3.0, 04/02, page 184 of 1064
Operation
DRn & H'7FFF FFFF FFFF

FFFF
DRn

DRn + DRm
DRn

When DRn = DRm, 1

Otherwise, 0
T

When DRn > DRm, 1

Otherwise, 0
T

DRn /DRm
DRn

double_to_ float[DRm]
float_to_ double [FPUL]

(float)FPUL
DRn

DRn *DRm
DRn
DRn ^ H'8000 0000 0000 0000

DRn


DRn
DRn

DRn – DRm
DRn

(long) DRm
FPUL
Operation

Rm
FPSCR

Rm
FPUL

(Rm)
FPSCR, Rm+4


(Rm)
FPUL, Rm+4

FPSCR
Rn

FPUL
Rn


Rn – 4
Rn, FPSCR


Rn – 4
Rn, FPUL
(Rn)
Instruction Code
1111nnn001011101 —
1111nnn0mmm00000 —
T
1111nnn0mmm00100 —
T
1111nnn0mmm00101 —
1111nnn0mmm00011 —
FPUL 1111mmm010111101 —

DRn 1111nnn010101101 —
1111nnn000101101 —
1111nnn0mmm00010 —
1111nnn001001101 —
1111nnn001101101 —
1111nnn0mmm00001 —
1111mmm000111101 —
Instruction Code
0100mmmm01101010 —
0100mmmm01011010 —

Rm
0100mmmm01100110 —
Rm
0100mmmm01010110 —
0000nnnn01101010 —
0000nnnn01011010 —
(Rn)
0100nnnn01100010 —
0100nnnn01010010 —
Privileged
T Bit
Comparison
result
Comparison
result
Privileged
T Bit

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sh7751r

Table of Contents