Texas Instruments TMS320C6A816 Series Technical Reference Manual page 31

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5-52. GPMC_SYSCONFIG
5-53. GPMC_SYSSTATUS
5-54. GPMC_IRQSTATUS
5-55. GPMC_IRQENABLE
5-56. GPMC_TIMEOUT_CONTROL
5-57. GPMC_ERR_ADDRESS
5-58. GPMC_ERR_TYPE
5-59. GPMC_CONFIG
5-60. GPMC_STATUS
5-61. GPMC_CONFIG1_i
5-62. GPMC_CONFIG2_i
5-63. GPMC_CONFIG3_i
5-64. GPMC_CONFIG4_i
5-65. GPMC_CONFIG5_i
5-66. GPMC_CONFIG6_i
5-67. GPMC_CONFIG7_i
5-68. GPMC_NAND_COMMAND_i
5-69. GPMC_NAND_ADDRESS_i
5-70. GPMC_NAND_DATA_i
5-71. GPMC_PREFETCH_CONFIG1
5-72. GPMC_PREFETCH_CONFIG2
5-73. GPMC_PREFETCH_CONTROL
5-74. GPMC_PREFETCH_STATUS
5-75. GPMC_ECC_CONFIG
5-76. GPMC_ECC_CONTROL
5-77. GPMC_ECC_SIZE_CONFIG
5-78. GPMC_ECCj_RESULT
5-79. GPMC_BCH_RESULT0_i
5-80. GPMC_BCH_RESULT1_i
5-81. GPMC_BCH_RESULT2_i
5-82. GPMC_BCH_RESULT3_i
5-83. GPMC_BCH_SWDATA
5-84. GPMC_BCH_RESULT4_i
5-85. GPMC_BCH_RESULT5_i
5-86. GPMC_BCH_RESULT6_i
6-1. HDMI Overview
6-2. HDMI Block Diagram
6-3. HDMI Environment
6-4. HDMI Integration
6-5. HDMI Audio Interface Overview
6-6. Audio Data Stuffing Behavior
6-7. Audio Data Stuffing Behavior with Only Three Stereo Channels Active
6-8. L-PCM 16-Bit Format Adaptation
6-9. Transmitter Video Data Processing Path
6-10. IP Revision Identifier Register (HDMI_WP_REVISION)
6-11. Clock Management Configuration Register (HDMI_WP_SYSCONFIG)
6-12. Raw Interrupt Status Register (HDMI_WP_IRQSTATUS_RAW)
6-13. Interrupt Status Register (HDMI_WP_IRQSTATUS)
6-14. Interrupt Enable Register (HDMI_WP_IRQENABLE_SET)
SPRUGX9 - 15 April 2011
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© 2011, Texas Instruments Incorporated
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List of Figures