Texas Instruments TMS320C6A816 Series Technical Reference Manual page 63

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3-73. Transmit Channel n Completion Pointer Register (TXnCP) Field Descriptions
3-74. Receive Channel n Completion Pointer Register (RXnCP) Field Descriptions
3-75. Management Data Input/Output (MDIO) Registers
3-76. MDIO Version Register (VERSION) Field Descriptions
3-77. MDIO Control Register (CONTROL) Field Descriptions
3-78. PHY Acknowledge Status Register (ALIVE) Field Descriptions
3-79. PHY Link Status Register (LINK) Field Descriptions
3-80. MDIO Link Status Change Interrupt (Unmasked) Register (LINKINTRAW) Field Descriptions
3-81. MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED) Field Descriptions
3-82. MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW) Field Descriptions
3-83. MDIO User Command Complete Interrupt (Masked) Register (USERINTMASKED) Field Descriptions
3-84. MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET) Field Descriptions
3-85. MDIO User Command Complete Interrupt Mask Clear Register (USERINTMASKCLEAR) Field
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Descriptions
3-86. MDIO User Access Register 0 (USERACCESS0) Field Descriptions
3-87. MDIO User PHY Select Register 0 (USERPHYSEL0) Field Descriptions
3-88. MDIO User Access Register 1 (USERACCESS1) Field Descriptions
3-89. MDIO User PHY Select Register 1 (USERPHYSEL1) Field Descriptions
4-1. GPIO Registers
4-2. GPIO_REVISION Register Field Descriptions
4-3. GPIO_SYSCONFIG Register Field Descriptions
4-4. GPIO_EOI Register Field Descriptions
4-5. GPIO_IRQSTATUS_RAW_n Register Field Descriptions
4-6. GPIO_IRQSTATUS_n Register Field Descriptions
4-7. GPIO_IRQSTATUS_SET_n Register Field Descriptions
4-8. GPIO_IRQSTATUS_CLR_n Register Field Descriptions
4-9. GPIO_SYSSTATUS Register Field Descriptions
4-10. GPIO_CTRL Register Field Descriptions
4-11. GPIO_OE Register Field Descriptions
4-12. GPIO_DATAIN Register Field Descriptions
4-13. GPIO_DATAOUT Register Field Descriptions
4-14. GPIO_LEVELDETECT0 Register Field Descriptions
4-15. GPIO_LEVELDETECT1 Register Field Descriptions
4-16. GPIO_RISINGDETECT Register Field Descriptions
4-17. GPIO_FALLINGDETECT Register Field Descriptions
4-18. GPIO_DEBOUNCENABLE Register Field Descriptions
4-19. GPIO_DEBOUNCINGTIME Register Field Descriptions
4-20. GPIO_CLEARDATAOUT Register Field Descriptions
4-21. GPIO_SETDATAOUT Register Field Descriptions
5-1. GPMC I/O Description
5-2. GPMC Pin Multiplexing Options
5-3. GPMC Integration Attributes
5-4. GPMC Clocks and Resets
5-5. GPMC Hardware Requests
5-6. GPMC Clocks
5-7. GPMC_CONFIG1_i Configuration
5-8. GPMC Local Power Management Features
5-9. GPMC Interrupt Events
5-10. Idle Cycle Insertion Configuration
SPRUGX9 - 15 April 2011
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Preliminary
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© 2011, Texas Instruments Incorporated
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List of Tables
504
504
514
514
515
516
516
517
518
519
520
521
522
523
524
525
526
537
538
539
540
541
541
542
542
543
544
544
545
545
546
546
547
547
548
548
549
549
554
554
558
559
559
560
560
560
561
572
63